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MACHLV210-15 Datasheet High Density Ee CMOS Programmable Logic

Manufacturer: Lattice

Overview: FINAL ’L: -12/15/20 IND: -18/24 MACHLV210-12/15/20 High Density EE CMOS Programmable Logic Lattice Semiconductor DISTINCTIVE CHARACTERISTICS s Low-voltage operation, 3.3-V JEDEC patible — VCC = +3.0 V to +3.6 V s < 5 mA standby current s Patented design allows minimal standby current without speed degradation s Exclusively designed for 3.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The MACHLV210 is a member of the highperformance EE CMOS MACH 2 device family.

This device has approximately six times the logic macrocell capability of the popular PAL22V10 at an equal speed with a lower cost per macrocell.

It is architecturally identical to the MACH210, with the addition of I/O pull-up/pull-down resistors and low-voltage, low-power operation.

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