2064VL Overview
The ispLSI 2064VL is a High Density Programmable Logic Device available in 64 and 32 I/O-pin versions. The device contains 64 Registers, four Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides plete interconnectivity between all of these elements.
2064VL Key Features
- SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC
- 2000 PLD Gates
- 64 and 32 I/O Pin Versions, Four Dedicated Inputs
- 64 Registers
- High Speed Global Interconnect
- Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc
- Small Logic Block Size for Random Logic
- 100% Functional, JEDEC and Pinout patible with ispLSI 2064V and 2064VE Devices 2.5V LOW VOLTAGE 2064 ARCHITECTURE
- Interfaces with Standard 3.3V TTL Devices (Inputs and I/Os are 3.3V Tolerant)
- 60 mA Typical Active Current HIGH-PERFORMANCE E2CMOS® TECHNOLOGY