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2064VL - 2.5VIn-SystemProgrammableSuperFASTHighDensityPLD

Datasheet Summary

Description

The ispLSI 2064VL is a High Density Programmable Logic Device available in 64 and 32 I/O-pin versions.

The device contains 64 Registers, four Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP).

Features

  • SuperFAST HIGH.

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Datasheet preview – 2064VL

Datasheet Details

Part number 2064VL
Manufacturer LatticeSemiconductor
File Size 188.06 KB
Description 2.5VIn-SystemProgrammableSuperFASTHighDensityPLD
Datasheet download datasheet 2064VL Datasheet
Additional preview pages of the 2064VL datasheet.

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Full PDF Text Transcription

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ispLSI 2064VL 2.5V In-System Programmable SuperFAST™ High Density PLD Features • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 and 32 I/O Pin Versions, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — 100% Functional, JEDEC and Pinout Compatible with ispLSI 2064V and 2064VE Devices 2.5V LOW VOLTAGE 2064 ARCHITECTURE — Interfaces with Standard 3.3V TTL Devices (Inputs and I/Os are 3.3V Tolerant) — 60 mA Typical Active Current HIGH-PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 165MHz Maximum Operating Frequency — tpd = 5.
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