LTC1750 Datasheet | Linear Technology

.. Features s s s s s s s s s s s s s s s 14-Bit, 80Msps Wide Bandwidth ADC DESCRIPTIO The LTC®1750 is an 80Msps, 14-bit A/D converter designed for digitizing wide dynamic range signals up to frequencies of 500MHz. The input range of the ADC can be optimized with the on-chip PGA sample-and-hold circuit and flexible reference circuitry. The LTC1750 has a highly linear sample-and-hold circuit with a bandwidth of 500MHz. The SFDR is 82d B with an input frequency of 250MHz. Ultralow jitter of 0.12ps RMS allows undersampling of IF frequencies with minimal degradation in SNR. DC specs include ±3LSB INL and no missing codes. The digital interface is patible with 5V, 3V, 2V and LVDS logic systems. The ENC and ENC inputs may be driven differentially from PECL, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ENC and ENC inputs may also be driven by a sinusoidal signal without degrading performance. A separate output power supply can be operated from 0.5V to 5V, making it easy to connect directly to any low voltage DSPs or FIFOs. The 48-pin TSSOP package with a flow-through pinout simplifies the board layout. , LTC and LT are registered trademarks of Linear Technology Corporation. U APPLICATIO S s s s s s s s Sample Rate: 80Msps 500MHz Full Power Bandwidth S/H Direct IF Sampling Up to 500MHz PGA Front End (2.25VP-P or 1.35VP-P Input Range) 75.5d B SNR and 90d B SFDR (PGA = 0) 73d B SNR and 90d B SFDR (PGA = 1) No Missing Codes Single 5V Supply Power Dissipation: 1.45W Two Pin Selectable Reference Values Two’s plement or Offset Binary Outputs Out-of-Range Indicator Data Ready Output Clock Pin-for-Pin Family 48-Pin TSSOP Package Telemunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems MRI Tomography BLOCK DIAGRA PGA AIN+ ±1.125V DIFFERENTIAL - ANALOG INPUT AIN SENSE 80Msps, 14-Bit ADC with a 2.25V Differential Input Range OVDD 0.1µF S/H CIRCUIT 14-BIT PIPELINED ADC...