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LTC6994-2 Datasheet PDF

Linear Technology LTC6994-2

The LTC6994 is part of the TimerBlox™ family of versatile silicon timing devices. The input-to-output delay is determined by this master oscillator and an internal clock divider, NDIV , programmable to eight settings from 1 to 221: tDELAY = NDIV • RSET • 1µs, NDIV = 1, 8, 64,...,221 50kΩ Delay Range: 1µs to 33.6 Seconds Configured with 1 to 3 Resistors Delay Max Error: – 512µs –
Part No. LTC6994-2
Datasheet LTC6994-2 Download
Manufacturer
Linear Technology
Description Delay Block / Debouncer
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LTC6994-2 datasheet page 1 preview

ELECTRICAL SPECIFICATIONS

Subject to Change LTC6994-1/LTC6994-2 TimerBlox: Delay Block/ Debouncer

FEATURES

n n n n n n n n n n

DESCRIPTION

The LTC®6994 is a programmable delay block with a range of 1µs to 33.6 seconds. A single resistor, RSET , programs the LTC6994’s internal master oscillator frequency. The input-to-output delay is determined by this master oscillator and an internal clock divider, NDIV , programmable to eight settings from 1 to 221: tDELAY = NDIV
● RSET
● 1µs, NDIV = 1, 8, 64,...,221 50kΩ Delay Range: 1µs to 33.6 Seconds Configured with 1 to 3 Resistors Delay Max Error: – <2.3% for Delay > 512µs – <3.4% for Delay of 8µs to 512µs – <5.1% for Delay of 1µs to 8µs Delay One or Both Rising/Falling Edges 2.25V to 5.5V Single Supply Operation 70µA Supply Current at 10µs Delay 500µs Start-Up Time CMOS Output Driver Sources/Sinks 20mA –40°C to 125°C Operating Temperature Range Available in Low Profile (1mm) SOT-23 (ThinSOT™) and 2mm × 3mm DFN

APPLICATIONS

n n n n n The output (OUT) follows the input (IN) after delaying the rising and/or falling transitions.
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