LTC2107 Datasheet | Linear Technology

Features n 98d BFS SFDR n80d BFS SNR Noise Floor n Aperture Jitter = 45fs RMS n PGA Front-End 2.4VP-P or 1.6VP-P Input Range n Optional Internal Dither n Optional Data Output Randomizer n Power Dissipation: 1280m W n Shutdown Mode n Serial SPI Port for Configuration n Clock Duty Cycle Stabilizer n48-Lead (7mm × 7mm) QFN Package Applications n Software Defined Radios n Military Radio and RADAR n Cellular Base Stations n Spectral Analysis n Imaging Systems n ATE and Instrumentation LTC2107 16-Bit, 210Msps High Performance ADC Description The LTC®2107 is a 16-bit, 210Msps high performance ADC. The bination of high sample rate, low noise and high linearity enable a new generation of digital radio designs. The direct sampling front-end is designed specifically for the most demanding receiver applications such as software defined radio and multi-channel GSM base stations. The AC performance includes, SNR = 80d BFS, SFDR = 98d BFS. Aperture jitter = 45fs RMS allows direct sampling of IF frequencies up to 500MHz with excellent performance. Features such as internal dither, a PGA front-end and digital output randomization help maximize performance. Modes of operation can be controlled through a 3-wire serial interface (SPI). The double data rate (DDR) low voltage differential (LVDS) digital outputs help reduce digital line count and enable space saving designs. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 7683695, 8482442, 8648741. Block Diagram VCM VCM DRIVER 2.2µF ANALOG INPUT AIN+ + INPUT AIN- S/H - CLOCK AND CLOCK CONTROL ENC+ ENC- 0V 2.5V 10µF SENSE INTERNAL REFERENCE 16-BIT ADC CORE VDD OVDD CORRECTION 16 OUTPUT LOGIC BUFFERS OF± CLKOUT± OGND ADC CONTROL/SPI INTERFACE SER/PAR SDI SCK CS SDO SHDN 2107 BD 1.8V...