LTC2193 Datasheet | Linear Technology

Features n 2-Channel Simultaneous Sampling ADC n Serial LVDS Outputs: 1, 2 or 4 Bits per Channel n 76.8d B SNR n 90d B SFDR n Low Power: 432m W/360m W/249m W Total n 216m W/180m W/125m W per Channel n Single 1.8V Supply n Selectable Input Ranges: 1VP-P to 2VP-P n 550MHz Full-Power Bandwidth S/H n Shutdown and Nap Modes n Serial SPI Port for Configuration n 52-Pin (7mm × 8mm) QFN Package APPLICATIONS nmunications n Cellular Base Stations n Software-Defined Radios n Portable Medical Imaging n Multi-Channel Data Acquisition n Nondestructive Testing LTC2195 LTC2194/LTC2193 16-Bit, 125/105/80Msps Low Power Dual ADCs DESCRIPTION The LTC®2195/LTC2194/LTC2193 are 2-channel, simultaneous sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding munications applications with AC performance that includes 76.8d B SNR and 90d B spurious free dynamic range (SFDR). Ultralow jitter of 0.07ps RMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.4LSBRMS. To minimize the number of data lines the digital outputs are serial LVDS. Each channel outputs two bits or four bits at a time. At lower sampling rates there is a one bit per channel option. The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC- inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION CH1 ANALOG INPUT CH2 ANALOG INPUT ENCODE INPUT S/H S/H 1.8V VDD 16-BIT...