LTC2205 Datasheet | Linear Technology

Features n Sample Rate: 65Msps/40Msps n 79d B SNR and 100d B SFDR (2.25VP-P Range) n SFDR >92d B at 140MHz (1.5VP-P Input Range) n PGA Front End (2.25VP-P or 1.5VP-P Input Range) n 700MHz Full Power Bandwidth S/H n Optional Internal Dither n Optional Data Output Randomizer n Single 3.3V Supply n Power Dissipation: 610m W/480m W n Optional Clock Duty Cycle Stabilizer n Out-of-Range Indicator n Pin patible Family 105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit) 80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit) 65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit) 40Msps: LTC2204 (16-Bit) n 48-Pin (7mm × 7mm) QFN Package APPLICATIONS n Telemunications n Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE LTC2205/LTC2204 16-Bit, 65Msps/40Msps ADCs DESCRIPTION The LTC®2205/LTC2204 are sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end. The LTC2205/LTC2204 are perfect for demanding munications applications, with AC performance that includes 79d B SNR and 100d B spurious free dynamic range (SFDR). Ultralow jitter of 90fs RMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4LSB INL, ±1LSB DNL (no missing codes). A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC- inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION VCM 2.2μF 1.25V MON MODE BIAS VOLTAGE 3.3V SENSE INTERNAL ADC REFERENCE GENERATOR OVDD AIN+ ANALOG INPUT AIN- + S/H AMP - 16-BIT PIPELINED ADC...