LTC2215 Datasheet | Linear Technology

Features n Sample Rate: 80Msps/65Msps n 81.5d BFS Noise Floor n 100d B SFDR n SFDR >95d B at 70MHz n 85fs RMS Jitter n 2.75VP-P Input Range n 400MHz Full Power Bandwidth S/H n Optional Internal Dither n Optional Data Output Randomizer n LVDS or CMOS Outputs n Single 3.3V Supply n Power Dissipation: 970m W/700m W n Clock Duty Cycle Stabilizer n Pin-patible with LTC2208, LTC2217 n 64-Pin (9mm × 9mm) QFN Package APPLICATIONS n Telemunications n Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE LTC2216/LTC2215 16-Bit, 80Msps/65Msps Low Noise ADC DESCRIPTION The LTC®2216/LTC2215 are 80Msps/65Msps sampling 16bit A/D converters designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is fixed at 2.75VP-P. The LTC2216/LTC2215 are perfect for demanding munications applications, with AC performance that includes 81.5d BFS noise floor and 100d B spurious free dynamic range (SFDR). Ultra low jitter of 85fs RMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specs include ±3.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC- inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 3.3V SENSE VCM 2.2μF 1.575V MON MODE BIAS VOLTAGE INTERNAL ADC REFERENCE GENERATOR OVDD AIN+ ANALOG INPUT...