LTC2261-14 Datasheet | Linear Technology

Features n 73.4d B SNR n 85d B SFDR n Low Power: 127m W/106m W/89m W n Single 1.8V Supply n CMOS, DDR CMOS or DDR LVDS Outputs n Selectable Input Ranges: 1VP-P to 2VP-P n 800MHz Full-Power Bandwidth S/H n Optional Data Output Randomizer n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Serial SPI Port for Configuration n Pin patible 14-Bit and 12-Bit Versions n 40-Pin (6mm × 6mm) QFN Package Applications n munications n Cellular Base Stations n Software Defined Radios n Portable Medical Imaging n Multi-Channel Data Acquisition n Nondestructive Testing LTC2261-14 LTC2260-14/LTC2259-14 14-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs Description The LTC®2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding munications applications with AC performance that includes 73.4d B SNR and 85d B spurious free dynamic range (SFDR). Ultralow jitter of 0.17ps RMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS. The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC- inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application ANALOG INPUT + INPUT S/H - 1.8V VDD 14-BIT PIPELINED ADC CORE CORRECTION LOGIC CLOCK/DUTY CYCLE CONTROL GND 125MHz CLOCK OUTPUT DRIVERS 1.2V TO 1.8V OVDD D13 - CMOS -...