LTC3831 Datasheet | Linear Technology

LTC3831 High Power Synchronous Switching Regulator Controller for DDR Memory Termination Features s s s s s s s s DESCRIPTIO s s s s s U APPLICATIO S s s s High Power Switching Regulator Controller for DDR Memory Termination VOUT Tracks 1/2 of VIN or External VREF No Current Sense Resistor Required Low Input Supply Voltage Range: 3V to 8V Maximum Duty Cycle > 91% Over Temperature Drives All N-Channel External MOSFETs High Efficiency: Over 95% Possible Programmable Fixed Frequency Operation: 100k Hz to 500k Hz External Clock Synchronization Operation Programmable Soft-Start Low Shutdown Current: <10µA Overtemperature Protection Available in 16-Pin Narrow SSOP Package The LTC®3831 is a high power, high efficiency switching regulator controller designed for DDR memory termination. The LTC3831 generates an output voltage equal to 1/2 of an external supply or reference voltage. The LTC3831 uses a synchronous switching architecture with N-channel MOSFETs. Additionally, the chip senses output current through the drain-source resistance of the upper N-channel FET, providing an adjustable current limit without a current sense resistor. The LTC3831 operates with input supply voltage as low as 3V and with a maximum duty cycle of > 91%. It includes a fixed frequency PWM oscillator for low output ripple operation. The 200k Hz free-running clock frequency can be externally adjusted or synchronized with an external signal from 100k Hz to above 500k Hz. In shutdown mode, the LTC3831 supply current drops to <10µA. , LTC and LT are registered trademarks of Linear Technology Corporation. DDR SDRAM Termination SSTL_2 Interface SSTL_3 Interface TYPICAL APPLICATIO 5V VDDQ 2.5V MBR0530T1 1µF 0.1µF 0.1µF PVCC2 VCC 0.01µF 130k SHDN C1 33p F RC 15k CC 1500p F SS PVCC1 TG IMAX LTC3831 IFB FREQSET SHDN P BG PGND GND R+ R- FB CIN: SANYO POSCAP 6TPB330M COUT: SANYO POSCAP 4TPB470M Q1, Q2: SILICONIX Si4410DY Q2 MBRS340T3 1k 0.1µF LO 1.2µH 10k Q1 MBRS340T3 + CIN 330µF ×2 EFFICIENCY...