LTC4300A-3 Datasheet | Linear Technology

Features n Bidirectional Buffer- for SDA and SCL Lines Increases Fanout n Prevents SDA and SCL Corruption During Live Board Insertion and Removal From Backplane n Logic Threshold ENABLE Input n Isolates Input SDA and SCL Lines From Output n patible with I2C, I2C Fast Mode and SMBus Standards (Up to 400k Hz Operation) n 1V Precharge on all SDA and SCL Lines n Supports Clock Stretching, Arbitration and Synchronization - 5V to 3.3V Level Translation - High Impedance SDA, SCL Pins for VCC = 0V, VCC2 = 0V - Small 8-Lead DFN and MSOP Packages Applications n Hot Board Insertion n Servers n Capacitance Buffer/Bus Extender n Desktop puter Level-Shifting Hot Swappable 2-Wire Bus Buffer with Enable Description The LTC®4300A-3 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When the connection is made, the LTC4300A-3 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. The LTC4300A-3 provides level translation between 3.3V and 5V supplies. The backplane and card can both be powered with supplies ranging from 2.7V to 5.5V. The LTC4300A-3 also incorporates a CMOS threshold ENABLE pin which forces the part into a low current mode and isolates the card from the backplane. When driven to VCC, the ENABLE pin sets normal operation. The LTC4300A-3 is available in the MSOP and 3mm × 3mm DFN packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap and Thin SOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. - Patent pending. Typical Application VCC 3.3V SCLIN 10k 10k 8 3 0.01µF 10k VCC2 0.01µF 10k SCLOUT 6 SDAIN 7...