LTC4302-2 Datasheet | Linear Technology

Features Bidirectional Buffer for SDA and SCL Lines Increases Fanout s Connect SDA and SCL Lines with 2-Wire Bus mands s Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane .. s patible with I2CTM Standard Mode, I2C Fast Mode and SMBus Standards s Rise Time Accelerators on SDA, SCL Lines s 1V Precharge on SDA and SCL Lines s 32 Unique Addresses from a Single ADDRESS Pin s Two General Purpose Inputs-Outputs (LTC4302-1) s Translates Between 5V and 3.3V Systems (LTC4302-2) s Small 10-Pin MSOP Package s LTC4302-1/LTC4302-2 Addressable 2-Wire Bus Buffers DESCRIPTIO The LTC®4302-1/LTC4302-2 addressable I2C bus and SMBus patible bus buffers allow a peripheral board to be inserted and removed from a live backplane without corruption of the bus. The LTC4302-1/LTC4302-2 maintain electrical isolation between the backplane and peripheral board until their VCC supply is valid and a master device on the backplane side addresses the LTC4302-1/ LTC4302-2 and mands them to connect. The LTC4302-1/LTC4302-2’s ADDRESS pin provides 32 possible addresses set by an external resistive divider between VCC and GND. The LTC4302-1/LTC4302-2 work with supply voltages ranging from 2.7V to 5.5V. The SDA and SCL inputs and outputs do not load the bus lines when VCC is low. Rise time accelerator circuitry- allows for heavier capacitive bus loading while still meeting system timing requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Two general purpose input/output pins (GPIOs) on the LTC4302-1 can be configured as inputs, open-drain outputs or push-pull outputs. The LTC4302-2 option replaces one GPIO pin with a second supply voltage pin VCC2, providing level shifting between systems with different supply voltages. The LTC4302-1/LTC4302-2 are available in a 10-pin MSOP package. U APPLICATIO S s s s s s Live Board Insertion 5V/3.3V Level Translator Servers Capacitance Buffer/Bus...