F60C1A0002-M6
Key Features
- Density: 2G bits
- Organization 128Meg x 16 bits
- Package 96-ball FBGA Lead-free (RoHS pliant) and Halogen-free
- Power supply VDD/VDDQ =1.35V (1.283 to 1.45V)
- Differential clock inputs (CK and CK#)
- Data Rate: 10:04 1600Mbps/1866Mbps 2022-07-25
- 2KB page size (x16) Row address: A0 to A13 Column address: A0 to A9
- mands entered on each positive CK edge; data and data mask referenced to both edges of DQS
- Data mask (DM) for write data
- Posted CAS by programmable additive
