MD5811-D256-V3Q18 Datasheet | M-Systems

h capacity: 256Mbit (32MByte) Device cascading option: up to 1Gbit (128MByte) Enhanced Programmable Boot Block enabling e Xecute In Place (XIP) functionality using 16-bit interface Small form factors: 48-pin TSOP-I package 85-ball FBGA 7x10x1.2 mm package Enhanced performance with: Multi-plane operation DMA support Multi Burst operation Turbo operation Unrivaled data integrity with a robust Error Detection Code/Error Correction Code (EDC/ECC) Maximized flash endurance with True FFS® 6.1 (and higher) flash management software Support for major mobile OSs, including: Symbian OS, Pocket PC 2002/3, Smartphone 2002/3, Palm OS, Nucleus, Linux, Windows CE patible with major mobile CPUs, including TI OMAP, XScale, Motorola Dragon Ball MX1 and Qualm MSMxxxx. Preliminary Data Sheet, Rev. 0.3 93-SR-009-8L .. Mobile Disk On Chip P3 Performance Boot Capability Multi Burst read: 80 MB/sec Sustained read: 5 MB/sec Sustained write: 2.5 MB/sec Access time: Normal: 55 nsec Turbo: 33 nsec Multi Burst: 25 nsec Protection & Security-Enabling Features 16-byte Unique Identification (UID) number 6KByte user-controlled One Time Programmable (OTP) area Two configurable hardware-protected partitions for data and code: Read-only mode Write-only mode One-Time Write mode (ROM-like) partition Protection key and LOCK# signal Sticky Lock (SLOCK) to lock boot partition Protected Bad Block Table Reliability and Data Integrity 2KB Programmable Boot Block with XIP capability to replace boot NOR Download Engine (DE) for automatic download of boot code from Programmable Boot Block Boot options: CPU initialization Platform initialization OS boot Asynchronous Boot mode to boot from ARM-based CPUs, e.g. XScale, TI OMAP, without the need for external glue logic Exceptional boot performance with Multi Burst operation and DMA support enhanced by external clock Hardware patibility Hardware- and software-driven, on-the-fly EDC and ECC algorithms 4-bit Error Detection Code/Error Correction Code (EDC/ECC),...