MX25L12845G
Features
- Protocol Support
- Single I/O, Dual I/O and Quad I/O
- Supports DTR (Double Transfer Rate) Mode
- Supports clock frequencies up to 133MHz
P/N: PM2145
Macronix Proprietary
Rev. 1.8, August 06, 2020
1. FEATURES
3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO® (SERIAL MULTI I/O) FLASH MEMORY
GENERAL
- Supports Serial Peripheral Interface -- Mode 0 and
Mode 3
- Single Power Supply Operation
- 2.7 to 3.6 volts for read, erase, and program operations
- 134,217,728 x 1 bit structure or 67,108,864 x 2 bits (two I/O mode) structure or 33,554,432 x 4 bits (four I/O mode) structure
- Protocol Support
- Single I/O, Dual I/O and Quad I/O
- Latch-up protected to 100m A from -1V to Vcc +1V
- Low Vcc write inhibit is from 1.5V to 2.5V
- Fast read for SPI mode
- Supports clock frequency up to 133MHz for all protocols
- Supports Fast Read, 2READ, DREAD, 4READ, QREAD instructions
- Supports DTR (Double Transfer Rate) Mode
- Configurable dummy cycle number for fast read operation
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