PC28F00AP30BFB
Overview
- High performance
- Easy BGA package features - 100ns initial access for 512Mb, 1Gb Easy BGA - 105ns initial access for 2Gb Easy BGA - 25ns 16-word asychronous page read mode - 52 MHz (Easy BGA) with zero WAIT states and 17ns clock-to-data output synchronous burst read mode - 4-, 8-, 16-, and continuous word options for burst mode
- TSOP package features - 110ns initial access for 512Mb, 1Gb TSOP
- Both Easy BGA and TSOP package features - Buffered enhanced factory programming (BEFP) at 2 MB/s (TYP) using a 512-word buffer - 1.8V buffered programming at 1.46 MB/s (TYP) using a 512-word buffer
- Architecture - MLC: highest density at lowest cost - Symmetrically blocked architecture (512Mb, 1Gb, 2Gb) - Asymmetrically blocked architecture (512Mb, 1Gb); four 32KB parameter blocks: top or bottom configuration - 128KB main blocks - Blank check to verify an erased block
- Voltage and power - VCC (core) voltage: 1.7-2.0V - VCCQ (I/O) voltage: 1.7-3.6V - Standy current: 70µA (TYP) for 512Mb; 75µA (TYP) for 1Gb - 52 MHz continuous synchronous read current: 21mA (TYP), 24mA (MAX)
- Security - One-time programmable register: 64 OTP bits, programmed with unique information from Micron; 2112 OTP bits available for customer programming - Absolute write protection: V PP = V SS - Power-transition erase/program lockout - Individual zero-latency block locking - Individual block lock-down - Password access
- Software - 25μs (TYP) program suspend - 25μs (TYP) erase suspend - Flash Data Integrator optimized - Basic command set and extended function Interface (EFI) command set comp
