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MP5014AGJ - Programmable Current-Limit Switch

Download the MP5014AGJ datasheet PDF. This datasheet also covers the MP5014A variant, as both devices belong to the same programmable current-limit switch family and are provided as variant models within a single manufacturer datasheet.

General Description

The MP5014A is a protection device designed to protect circuitry on the output (source) from transients on the input (VCC).

Also, it protects VCC from undesired shorts and transients coming from the source.

At start-up, the inrush current is limited by restricting the slew rate at the source.

Key Features

  • 10 V to 13.8 V Operating Input Range.
  • 15 V Typical Output Over-Voltage Clamp.
  • Absolute Maximum Voltage of 22 V.
  • Input Under-Voltage Lockout.
  • Low Inrush Current during Start-Up.
  • Integrated 36 mΩ Power FET.
  • Enable/Fault Pin.
  • Adjustable Slew Rate for Output Voltage.
  • Adjustable Current Limit.
  • Thermal Protection.
  • TSOT23-8 Package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MP5014A-MPS.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Monolithic Power Systems

Part Number Description
MP5014A Programmable Current-Limit Switch
MP5010 Programmable Current Limit Switch
MP5010DQ Programmable Current Limit Switch
MP5013A 5A Programmable Current-Limit Switch
MP5013E Programmable Current-Limit Switch

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
The Future of Analog IC Technology MP5014A 12 V, 5 A, Programmable Current-Limit Switch with Over-Volatge Clamp and Slew-Rate Control in TSOT23-8 DESCRIPTION The MP5014A is a protection device designed to protect circuitry on the output (source) from transients on the input (VCC). Also, it protects VCC from undesired shorts and transients coming from the source. At start-up, the inrush current is limited by restricting the slew rate at the source. The slew rate is controlled by a small capacitor at DV/DT. DV/DT has an internal circuit that allows this pin to float (no connection) and still receive 1 ms ramp time at the source. The maximum load at the output is current limited. This is accomplished by utilizing a sense FET topology.