Datasheet Summary
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SEQUENTIAL 64M-BIT MASK ROM
Features
- Bit organization
- 4M x 16 (word mode only)
- 256 words/page
- Total 16K pages
- Sequential access at 200ns cycle time in a page
- Asynchronous chip enable input (ALEH, ALEL)
- Access time
- Read latency time: 950ns
- Read cycle time: 200ns
- RD access time: 150ns
- Current
- Operating:25mA(max.)
- Address input:2mA(max.)
- Standby:20uA(max.)
- Supply voltage
- 3.0V~3.6V
- Package
- 32 pin TSOP
ORDER INFORMATION
Part No. MX23L6412TC-20 Read Cycle Time 200ns Package 32 pin TSOP
DataShee
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GENERAL DESCRIPTION
The product is a 64M bits (4M x 16) mask ROM posed of 16K pages, and each consists of 256...