DS28E02 Datasheet | Maxim Integrated

Description The DS28E02 bines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E02 has its own guaranteed unique 64-bit ROM registration number that is factory installed into the chip. The DS28E02 municates over the single-contact 1-Wire® bus. The munication follows the standard 1-Wire protocol with the registration number acting as the node address in the case of a multidevice 1-Wire network. Features - 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits - On-Chip 512-Bit SHA-1 Engine to pute 160Bit Message Authentication Codes (MACs) and to Generate Secrets - Write Access Requires Knowledge of the Secret and the Capability of puting and Transmitting a 160-Bit MAC as Authorization - User-Programmable Page Write Protection for Page 0, Page 3, or All Four Pages Together - User-Programmable OTP EPROM Emulation Mode for Page 1 (“Write to 0”) - municates to Host with a Single Digital Signal at 12.5kbps or 35.7kbps Using 1-Wire Protocol - Switchpoint Hysteresis and Filtering to Optimize munication Performance in the Presence of Noise - Reads and Writes Over 1.75V to 3.65V Voltage Range from -20°C to +85°C - 6-Lead TSOC and TDFN Packages Applications Reference Design License Management System Intellectual Property Protection Sensor/Accessory Authentication and Calibration Medical Consumable Authentication Printer Cartridge Configuration and Monitoring Typical Operating Circuit PART VCC RPUP IO μC DS28E02 Ordering Information TEMP RANGE -20°C to +85°C -20°C to +85°C -20°C to +85°C PIN-PACKAGE 6 TSOC 6 TSOC 6 TDFN-EP- (2.5k pcs) DS28E02P+ DS28E02P+T&R DS28E02Q+T&R +Denotes a lead(Pb)-free/Ro...