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MAX3620 - Delay Lines

General Description

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Key Features

  • Supports HSTL Source Terminated Lines.
  • All-Passive Design.
  • Compatible with 100Ω Differential and 50Ω SingleEnded Transmission Lines.
  • Small 3mm x 3mm Package MAX3620 The MAX3620 series is a family of high-performance passive delay lines for use in QDR/QDRII synchronous memory systems. These delay lines support high-speed transceiver logic (HSTL) source terminated transmission with an unterminated load at the receiver, and deliver accurate delays of 0.75ns, 1.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-3550; Rev 0; 1/05 Delay Lines for High-Speed Clock Distribution Systems General Description www.datasheet4u.com Features ♦ Supports HSTL Source Terminated Lines ♦ All-Passive Design ♦ Compatible with 100Ω Differential and 50Ω SingleEnded Transmission Lines ♦ Small 3mm x 3mm Package MAX3620 The MAX3620 series is a family of high-performance passive delay lines for use in QDR/QDRII synchronous memory systems. These delay lines support high-speed transceiver logic (HSTL) source terminated transmission with an unterminated load at the receiver, and deliver accurate delays of 0.75ns, 1.00ns, 1.25ns, and 1.50ns for the generation of the quarter clock phase.