MAX9212 Overview
The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.
MAX9212 Key Features
- Programmable DC Balance or Non-DC Balance
- DC Balance Allows AC-Coupling for Wider Input mon-Mode Voltage Range
- As Low as 8MHz Operation (MAX9210/MAX9212/MAX9220)
- Falling-Edge Output Strobe (MAX9220/MAX9222)
- Slower Output Transitions for Reduced EMI (MAX9210/MAX9212/MAX9220)
- High-Impedance Outputs when PWRDWN is Low Allow Output Busing
- Pin patible with DS90CR216A/DS90CR218A (MAX9210/MAX9212/MAX9214/MAX9216)
- Fail-Safe Inputs in Non-DC-Balanced Mode
- 5V Tolerant PWRDWN Input
- PLL Requires No External ponents