Datasheet Summary
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19-2828; Rev 2; 2/04
Programmable DC-Balanced 21-Bit Serializers
General Description
The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization. The MAX9209/MAX9211/MAX9213/MAX9215 feature programmable DC balance, which allows isolation between the serializer and deserializer using AC-coupling. The DC balance circuits on each channel code the data, limiting the imbalance of transmitted ones and zeros to a defined range. The panion MAX9210/ MAX9212/MAX9214/MAX9216 deserializers decode the data. When DC balance is not programmed, the...