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MAX9254 - 21-Bit Deserializers

Datasheet Summary

Description

The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs.

A separate parallel-rate LVDS clock provides the timing for deserialization.

Features

  • high output drive current for both data and clock outputs for faster transition times in the presence of heavy capacitive loads. The MAX9242/MAX9244/MAX9246/MAX9254 feature program-mable DC balance, allowing isolation between a serializer and deserializer using AC-coupling. The MAX9242/MAX9244/MAX9246/MAX9254 operate with the MAX9209/MAX9213 serializers and are available with a rising-edge strobe (MAX9242) or falling-edge strobe (MAX9244/MAX9246/MAX9254). The LVDS inputs meet ISO 10605 ESD speci.

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Datasheet preview – MAX9254

Datasheet Details

Part number MAX9254
Manufacturer Maxim Integrated Products
File Size 265.87 KB
Description 21-Bit Deserializers
Datasheet download datasheet MAX9254 Datasheet
Additional preview pages of the MAX9254 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com 19-3954; Rev 2; 6/07 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance General Description The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock provides the timing for deserialization. The MAX9242/ MAX9244/MAX9246/MAX9254 feature spread-spectrum capability, allowing the output data and clock frequency to spread over a specified range to reduce EMI. The single-ended data and clock outputs are programmable for a frequency spread of ±2%, ±4%, or no spread. The spread-spectrum function is also available when the MAX9242/MAX9244/MAX9246/MAX9254 operate in nonDC-balanced mode.
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