MAX9425 Datasheet | Maxim Integrated

.. 19-2390; Rev 0; 4/02 Lowest Jitter Quad PECL-to-ECL Differential Translators General Description The MAX9424- MAX9427 high-speed, low-skew quad PECL-to-ECL translators are designed for high-speed data and clock driver applications. These devices feature an ultra-low 0.24ps(RMS) random jitter and channel-tochannel skew is less than 90ps in asynchronous mode. The four channels can be operated synchronously with an external clock, or in asynchronous mode determined by the state of the SEL input. An enable input provides the ability to force all the outputs to a differential low state. The parts differ from one another by their input and output termination options. The...