GENERAL DESCRIPTION
Using an integrated phase-locked loop (PLL), the DS1081L accepts an input clock signal in the range of 20MHz to 134MHz and delivers a spread-spectrum modulated output clock signal. In addition, through an enable pin the dithering can be enabled or disabled for easy comparison of system performance during EMI testing. By dithering the system clock, all the address, data, and timing signals generated from this signal are also dithered so that the measured EMI at the fundamental and harmonic frequencies is greatly reduced. This is accomplished without changing clock rise/fall times or adding the space, weight, design time, and cost associated with mechanical shielding. FEATURES
♦ Modulates a 20MHz to 134MHz Clock with Center Spread-Spectrum Dithering ♦ Selectable Spread-Spectrum Modulation Magnitudes of: ±0.5% ±1.0% ±1.5% ±2.0% ♦ Low 75ps Cycle-to-Cycle Jitter ♦ Spread-Spectrum Disable Mode ♦ Pin Compatible with Alliance/PulseCore Semiconductor P2040 Series Devices ♦ C...