DS1321 Description
Ining power is monitored for an out-of-tolerance condition. When such a condition is detected, chip enable outputs are inhibited to acplish write protection and the battery is switched on to supply the SRAMs with uninterrupted power. Special circuitry uses a low-leakage CMOS process which affords precise voltage detection at extremely low battery consumption.
DS1321 Key Features
- Converts CMOS SRAM into nonvolatile memory
- Unconditionally write-protects SRAM when VCC is out of tolerance
- Automatically switches to battery backup supply when VCC power failure occurs
- Flexible memory organization
- Mode 0: 4 banks with 1 SRAM each
- Mode 1: 2 banks with 2 SRAMs each
- Mode 2: 1 bank with 4 SRAMs each
- Monitors voltage of a lithium cell and provides advanced warning of impending battery failure
- Signals low-battery condition on active low Battery Warning output signal
- Resets processor when power failure occurs and holds processor in reset during system power-up