DS2476 Datasheet | Maxim Integrated

ABRIDGED DATA SHEET Click here for production status of specific part numbers. EVALUATION KIT AVAILABLE Deep Cover Secure Coprocessor General Description The DS2476 is a Deep Cover® secure ECDSA and HMAC SHA-256 coprocessor panion to the DS28C36. The coprocessor can pute any required HMACs or ECDSA signatures to do any operation on the DS28C36. The DS2476 provides a core set of cryptographic tools derived from integrated asymmetric (ECC-P256) and symmetric (SHA-256) security functions. In addition to the security services provided by the hardware implemented crypto engines, the device integrates a FIPS/NIST true random number generator (RNG), 8Kb of secured EEPROM, a decrement-only counter, two pins of configurable GPIO, and a unique 64-bit ROM identification number (ROM ID). The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 pliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are pliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multiple HMAC functions. Two GPIO pins can be independently operated under mand control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secureboot of a host processor. This secure boot method can also be used to enable the coprocessor functions. Deep Cover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods. Applications - - Io T Node Crypto-Protection - - Accessory and Peripheral Secure Authentication - - Secure Storage of Cryptographic Keys for a Host...