GENERAL DESCRIPTION
When paired with an external TCXO or OCXO, All input clocks are continuously monitored for frequency accuracy and activity. Any two of the input clocks can be selected as the references for the two core DPLLs. From the output of the core DPLLs, a wide variety of output clock frequencies and frame pulses can be produced simultaneously on the 11 output clock pins. Two DS3100 devices can be configured in a master/slave arrangement for timing card equipment protection. The DS3100 registers and I/O pins are backward compatible with Semtech’s ACS8520 and ACS8530 timing card ICs. FEATURES
Synchronization Subsystem for Stratum 3E, 3, 4E and 4, SMC and SEC - Meets Requirements of GR-1244 Stratum 3/3E, GR-253, G.812 Types I, III and IV, and G.813 - Stratum 3E Holdover Accuracy with Suitable External Oscillator - Programmable Bandwidth, 0.5mHz to 70Hz - Hitless Reference Switching on Loss of Input - Phase Build-Out and Transient Absorption - Locks to and Generates 125MHz for G...
Maxim Integrated
