GENERAL DESCRIPTION
An on-chip clock adapter generates all line-rate clocks from a single input clock. Control interface options include 8-bit parallel, SPI, and hardware mode. FEATURES
§ § § § § § § § Pin-Compatible Family of Products Each Port Independently Configurable Receive Clock and Data Recovery for Up to 380 meters (DS3), 440 meters (E3), or 360 meters (STS-1) of 75W Coaxial Cable Standards-Compliant Transmit Waveshaping Three Control Interface Options: 8-Bit Parallel, SPI, and Hardware Mode Built-In Jitter Attenuators can be Placed in Either the Receive or Transmit Paths Jitter Attenuators Have Provisionable Buffer Depth: 16, 32, 64, or 128 Bits Built-In Clock Adapter Generates All Line-Rate Clocks from a Single Input Clock (DS3, E3, STS-1, OC-3, 19.44MHz, 38.88MHz, 77.76MHz) B3ZS/HDB3 Encoding and Decoding Minimal External Components Required Local and Remote Loopbacks Low-Power 3.3V Operation (5V Tolerant I/O) Industrial Temperature Range: -40°C to +85°C Small Package: 144-...