GENERAL DESCRIPTION
Up to 32 TDM ports can be translated into as many as 256 individually configurable pseudowires (PWs) for transmission over a 100/1000Mbps Ethernet port. PW interworking for TDM-based serial HDLC data is also supported. A built-in time-slot assignment (TSA) circuit provides the ability to combine any group of time slots (TS) from a single TDM port into a single PW. The high level of integration provides the perfect solution for high-density applications to minimize cost, board space, and time to market. FEATURES
32 Independent TDM Ports with Serial Data, Clock, and Sync (Data = 64Kbps to 2.048Mbps) One 100/1000Mbps (MII/GMII) Ethernet MAC 256 Total PWs, 32 PW per TDM Port, with Any Combination of TDMoP and/or HDLC PWs PSN Protocols: L2TPv3 or UDP Over IP (IPv4 or IPv6), Metro Ethernet (MEF-8), or MPLS (MFA-8) 0, 1, or 2 VLAN Tags (IEEE 802.1Q) Synchronous or Asynchronous TDM Port Timing One Clock Recovery Engine per TDM Port with One Assignable as a Globa...