DESCRIPTION
Dual monolithic converters, driven by the track/hold (T/H), operate on opposite clock edges (time interleaved). Special comparator output design and decoding circuitry reduce out-of-sequence code errors. The probability of erroneous codes due to metastable states is reduced to less than 1 error per 1015 clock cycles. And, unlike other ADCs that can have errors resulting in false full-scale or zero-scale outputs, the MAX101A keeps the error magnitude to less than 1LSB. The analog input is designed for either differential or single-ended use with a ±250mV range. Sense pins for the reference input allow full-scale calibration of the input range or facilitate ratiometric use. Phase adjustment is available to adjust the relative sampling of the converter halves for optimizing converter performance. Input clock phasing is also available for interleaving several MAX101As for higher effective sampling rates. ____________________________Features o o o o o o o o o o 500Msps Conversio...
Maxim Integrated
