APPLICATIONS
GENERAL DESCRIPTION
At 250Msps and an input frequency of 100MHz, the MAX1121 achieves a spurious-free dynamic range (SFDR) of 68dBc. This makes the MAX1121 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1121 requires a single 1.8V supply. The analog input is designed for either differential or singleended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1121 is available in a 68-pin QFN with exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, hi...