GENERAL DESCRIPTION
To maximize the dynamic range, the DAC output amplifiers are configured with an internal gain of +2V/V. Each DAC has a double-buffered input organized as an input register followed by a DAC register, which allows the input and DAC registers to be updated independently or simultaneously with a 16-bit serial word. Additional features include programmable powerdown (2µA), hardware power-down lockout (PDL), a separate reference voltage input for each DAC that accepts AC and DC signals, and an active-low clear input (CL) that resets all registers and DACs to zero. These devices provide a programmable logic pin for added functionality, and a serial-data output pin for daisy chaining. ____________________________Features o 12-Bit Dual DAC with Internal Gain of +2V/V o Rail-to-Rail Output Swing o 12µs Settling Time o +5V Single-Supply Operation o Low Quiescent Current 500µA (normal operation) 2µA (power-down mode) o SPI/QSPI/MICROWIRE Compatible o Space-Saving 16-Pin QSOP Package o Power-On Reset Clears Registers and DACs to Zero o Adjustable Output Offset MAX5104 Ordering Information PART MAX5104CEE MAX5104EEE TEMP.