Datasheet4U Logo Datasheet4U.com

MAX1126 - Quad / 12-Bit / 40Msps / 1.8V ADC

Key Features

  • Four ADC Channels with Serial LVDS/SLVS Outputs.
  • Excellent Dynamic Performance 69.9dB SNR at fIN = 5.3MHz 93.7dBc SFDR at fIN = 5.3MHz -90dB Channel Isolation.
  • Ultra-Low Power 135mW per Channel (Normal Operation) 1.5mW Total (Shutdown Mode).
  • Accepts 20% to 80% Clock Duty Cycle.
  • Self-Aligning Data-Clock to Data-Output Interface.
  • Fully Differential Analog Inputs.
  • Wide ±1.4VP-P Differential Input Voltage Range.
  • Internal/Extern.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MAX11262 SAR ADC Maxim Integrated
MAX11200 Delta- Sigma ADCs Maxim Integrated Products
MAX11201 Delta- Sigma ADC Maxim Integrated Products
MAX11202 Delta- Sigma ADC Maxim Integrated Products
MAX11203 Delta- Sigma ADCs Maxim Integrated Products

Other Datasheets by Maxim Integrated (now Analog Devices)

Part Number Description
MAX1122 170Msps Analog-to-Digital Converter
MAX1125 8-Bit / 300Msps Flash ADC
MAX11253 Delta-Sigma ADC
MAX1127 Quad / 12-Bit / 65Msps / 1.8V ADC
MAX11270 64ksps Delta-Sigma ADC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
19-3143; Rev 1; 3/04 KIT ATION EVALU E L B AVAILA Quad, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs General Description Features ♦ Four ADC Channels with Serial LVDS/SLVS Outputs ♦ Excellent Dynamic Performance 69.9dB SNR at fIN = 5.3MHz 93.7dBc SFDR at fIN = 5.3MHz -90dB Channel Isolation ♦ Ultra-Low Power 135mW per Channel (Normal Operation) 1.5mW Total (Shutdown Mode) ♦ Accepts 20% to 80% Clock Duty Cycle ♦ Self-Aligning Data-Clock to Data-Output Interface ♦ Fully Differential Analog Inputs ♦ Wide ±1.