Datasheet4U Logo Datasheet4U.com

MAX3270 - 155Mbps/622Mbps Clock Recovery and Data Retiming IC

General Description

The MAX3270 is a complete Clock Recovery and Data Retiming IC for 155Mbps and 622Mbps SDH/SONET and ATM applications.

The MAX3270 meets Bellcore and CCITT jitter tolerance specifications ensuring errorfree data recovery.

Key Features

  • o Supports Both 155Mbps and 622Mbps Clock Recovery and Data Retiming o Fully Integrated Phase/Frequency Detector o Capable of Switching to an External Clock o Differential 100K ECL Data and Clock I/Os o Output Monitor Provides Lock Detection o No External Reference Clock Required PART MAX3270EMH Ordering Information TEMP. RANGE -40°C to +85°C PIN-.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MAX327 Quad / SPST / Ultra-Low Leakage / CMOS Analog Switches Maxim Integrated
MAX3272A +3.3V / 2.5Gbps Low-Power Limiting Amplifier Maxim Integrated
MAX3202E ESD Protection Arrays Maxim Integrated
MAX3203E ESD Protection Arrays Maxim Integrated
MAX3204E ESD Protection Arrays Maxim Integrated

Other Datasheets by Maxim Integrated (now Analog Devices)

Part Number Description
MAX3272 +3.3V / 2.5Gbps Low-Power Limiting Amplifier
MAX3273 +3.3V / 2.5Gbps Low-Power Laser Driver
MAX320 Precision / Dual-Supply / SPST Analog Switches
MAX3209E 15kV ESD-Protected / 12V / Dual RS-232 Serial Port
MAX3212 +2.7V to+3.6V-Powered / 1A Supply Current / 3-Driver/5-Receiver / True RS-232Transceiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
19-0379; Rev 1; 11/99 MAX3270 155Mbps/622Mbps Clock Recovery and Data Retiming IC with Fully Integrated Phase/Frequency Detector _______________General Description The MAX3270 is a complete Clock Recovery and Data Retiming IC for 155Mbps and 622Mbps SDH/SONET and ATM applications. The MAX3270 meets Bellcore and CCITT jitter tolerance specifications ensuring errorfree data recovery. Recovered clock and data are phase aligned using a fully integrated phase-locked loop (PLL). An output frequency monitor (FM) is included to detect loss of PLL acquisition or a loss of input data. The MAX3270 has differential ECL input and output interfaces, so it is less susceptible to noise in a highfrequency environment.