Datasheet4U Logo Datasheet4U.com

MAX3681 - +3.3V / 622Mbps / SDH/SONET 1:4 Deserializer

General Description

The MAX3681 deserializer is ideal for converting 622Mbps serial data to 4-bit-wide, 155Mbps parallel data in ATM and SDH/SONET applications.

Key Features

  • o Single +3.3V Supply o 622Mbps Serial to 155Mbps Parallel Conversion o 265mW Power o LVDS Data Outputs and Synchronization Inputs o Synchronization Input for Data Realignment and Reframing o Differential 3.3V PECL Clock and Data Inputs _________________General.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MAX3680A +3.3V / 622Mbps / SDH/SONET 1:8 Deserializer Maxim Integrated
MAX3600 Laser Driver Maxim Integrated Products
MAX362 Precision / Quad / SPST Analog Switches Maxim Integrated
MAX3620 Delay Lines Maxim Integrated Products
MAX3622 Precision Clock Generator Microsemi

Other Datasheets by Maxim Integrated (now Analog Devices)

Part Number Description
MAX368 Fault-Protected Analog Multiplexer with Latch
MAX3680 +3.3V / 622Mbps / SDH/SONET 1:8 Deserializer
MAX361 Precision / Quad / SPST Analog Switches
MAX364 Precision / Quad / SPST Analog Switches
MAX365 Precision / Quad / SPST Analog Switches

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
19-1091; Rev 0; 6/96 K ATION EVALU BLE AVAILA IT +3.3V, 622Mbps, SDH/SONET 1:4 Deserializer with LVDS Outputs ______________________________Features o Single +3.3V Supply o 622Mbps Serial to 155Mbps Parallel Conversion o 265mW Power o LVDS Data Outputs and Synchronization Inputs o Synchronization Input for Data Realignment and Reframing o Differential 3.3V PECL Clock and Data Inputs _________________General Description The MAX3681 deserializer is ideal for converting 622Mbps serial data to 4-bit-wide, 155Mbps parallel data in ATM and SDH/SONET applications. Operating from a single +3.3V supply, this device accepts PECL serial clock and data inputs, and delivers low-voltage differential-signal (LVDS) clock and data outputs for interfacing with high-speed digital circuitry.