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MAX9316A - 1:5 Differential LVPECL/LVECL/ HSTL Clock and Data Driver

Key Features

  • o Guaranteed 400mV Differential Output at 1.5GHz o Selectable Single-Ended or Differential Input o 130ps (max) Part-to-Part Skew at +25°C o 20ps Output-to-Output Skew o 365ps Propagation Delay o Synchronous Output Enable/Disable o On-Chip Reference for Single-Ended Inputs o Input Biased to Low when Open o Pin Compatible with MC100EL14 MAX9316A The MAX9316A is a low-skew, 1-to-5 differential driver designed for clock and data distribution. This device allows selection between two inputs: one di.

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19-2648; Rev 0; 10/02 KIT ATION EVALU E L B AVAILA 1:5 Differential (LV)PECL/(LV)ECL/ HSTL Clock and Data Driver General Description Features o Guaranteed 400mV Differential Output at 1.5GHz o Selectable Single-Ended or Differential Input o 130ps (max) Part-to-Part Skew at +25°C o 20ps Output-to-Output Skew o 365ps Propagation Delay o Synchronous Output Enable/Disable o On-Chip Reference for Single-Ended Inputs o Input Biased to Low when Open o Pin Compatible with MC100EL14 MAX9316A The MAX9316A is a low-skew, 1-to-5 differential driver designed for clock and data distribution. This device allows selection between two inputs: one differential and one single ended. The selected input is reproduced at five differential outputs.