MG86FE104 Overview
8051-Based MCU MG86FE/L104 Data Sheet Version: A1.5 is document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this product without notice.
MG86FE104 Key Features
- 1-T 80C51 Central Processing Unit
- MG86FE/L104 with 4K Bytes flash ROM ━ ISP memory zone could be optioned as 0.5KB/1KB/1.5KB……3.5KB ━ Flexible IAP size. ━
- For 0.5K IAP, the MTP of IAP write cycle is 2,000 times
- For 1.0K IAP, the MTP of IAP write cycle is 1,000 times ━ Flash data retention: 100 years at 25℃ ━ MG86FE/L104 Flash spa
- AP Flash（0000h~07FFh）
- IAP Flash（0800h~0BFFh）
- ISP Flash（0C00h~0FFFh）（ISP Boot code）
- On-chip 256 bytes scratch-pad RAM
- Interrupt controller ━ 6 sources, four-level-prio