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MLX81215 - (MLX81205 - MLX81215) BLDC Motor Controller

Download the MLX81215 datasheet PDF. This datasheet also covers the MLX81205 variant, as both devices belong to the same (mlx81205 - mlx81215) bldc motor controller family and are provided as variant models within a single manufacturer datasheet.

General Description

6 ELECTRICAL CHARACTERISTICS 7 3.1 3.2 4.

Key Features

  • Microcontroller: MLX16-FX RISC CPU o o o o 16 bit RISC CPU with 20DMIPS and Power-Saving-Modes Co-processor for fast multiplication and division Flash and EEPROM memory with EEC In-circuit debug and emulation Supported bus interfaces: o o o o LIN-Interface with integrated LIN transceiver supporting LIN 2.x, certified LIN protocol software provided by Melexis In-Module-Programming (Flash and EE) via pin LIN using a special Melexis fast protocol PWM-Interface Full duplex SPI, Master/Slave, doub.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MLX81205-Melexis.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number MLX81215
Manufacturer Melexis
File Size 483.79 KB
Description (MLX81205 - MLX81215) BLDC Motor Controller
Datasheet download datasheet MLX81215 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MLX81205/07/10/15 Features Microcontroller: MLX16-FX RISC CPU o o o o 16 bit RISC CPU with 20DMIPS and Power-Saving-Modes Co-processor for fast multiplication and division Flash and EEPROM memory with EEC In-circuit debug and emulation Supported bus interfaces: o o o o LIN-Interface with integrated LIN transceiver supporting LIN 2.x, certified LIN protocol software provided by Melexis In-Module-Programming (Flash and EE) via pin LIN using a special Melexis fast protocol PWM-Interface Full duplex SPI, Master/Slave, double-buffered, speed programmable. DMA access. Flash and EEPROM programming also possible via SPI.