• Part: KS8995X
  • Description: Integrated 5-Port 10/100 QoS Switch
  • Manufacturer: Micrel Semiconductor
  • Size: 214.57 KB
Download KS8995X Datasheet PDF
Micrel Semiconductor
KS8995X
KS8995X is Integrated 5-Port 10/100 QoS Switch manufactured by Micrel Semiconductor.
Micrel Integrated 5-Port 10/100 Qo S Switch Rev. 1.13 General Description The KS8995X is a highly integrated Layer-2 Qo S (Quality of Service) switch with optimized BOM (Bill of Materials) cost for low port count, cost-sensitive 10/100Mbps switch systems. It also provides an extensive feature set including three different Qo S priority schemes, a dual MII interface for BOM cost reduction, rate limiting to offload CPU tasks, software and hardware power-down, a MDC/MDIO control interface and port mirroring/monitoring to effectively address both current and emerging Fast Ethernet applications. The KS8995X contains five 10/100 transceivers with patented mixed-signal low-power technology, five MAC (Media Access Control) units, a high-speed non-blocking switch fabric, a dedicated address lookup engine, and an on-chip frame buffer memory. All PHY units support 10Base T and 100Base TX. In addition, two of the PHY units support 100Base FX (Ports 4 and 5). All support documentation can be found on Micrel’s web site at .micrel.. Features - Integrated switch with five MACs and five Fast Ethernet transceivers fully pliant to IEEE 802.3u standard - Shared memory based switch fabric with fully nonblocking configuration - 10Base T, 100Base TX and 100Base FX modes (FX in Ports 4 and 5) - Dual MII configuration: MII-Switch (MAC or PHY mode MII) and MII-P5 (PHY mode MII) - VLAN ID tag/untag options, per-port basis - Enable/disable option for huge frame size up to 1916 bytes per frame - Broadcast storm protection with percent control - global and per-port basis - Optimization for fiber-to-copper media conversion - Full-chip hardware power-down support (register configuration not saved) - Per-port-based software power-save on PHY (idle link detection, register configuration preserved) - Qo S/Co S packets prioritization supports: per port, 802.1p and Diff Serv based Functional Diagram Auto MDI/MDIX Auto MDI/MDIX Auto MDI/MDIX Auto MDI/MDIX Auto MDI/MDIX MII-P5 MDC,...