MIC68200 Datasheet | Micrel Semiconductor

Description The MIC68200 is a high peak current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start up current with lower nominal operating current. Capable of sourcing 2A of current for start-up, the MIC68200 provides high power from a small MLF® leadless package. The MIC68200 can also implement a variety of power-up and power-down protocols such as sequencing, tracking, and ratiometric tracking. The MIC68200 operates from a wide input range of 1.65V to 5.5V, which includes all of the main supply voltages monly available today. It is designed to drive digital circuits requiring low voltage at high currents (i.e. PLDs, DSP, microcontroller, etc.). The MIC68200 incorporates a delay pin (DLY) for control of power on reset output (POR) at turn-on and powerdown delay at turn-off. In addition there is a ramp control pin (RC) for either tracking applications or output voltage slew rate adjustment at turn-on. This is important in applications where the load is highly capacitive and in-rush currents can cause supply voltages to fail and microprocessors or other plex logic chips to hang up. Multiple MIC68200s can be daisy chained in two modes. In tracking mode the output voltage of the Master drives the RC pin of a Slave so that the Slave tracks the main regulator during turn-on and turn-off. In sequencing mode the POR of the Master drives the enable (EN) of the Slave so that it turns on after the Master and turns off before (or after) the Master. This behavior is critical for power-up and power-down control in multi-output power supplies. The MIC68200 is fully protected offering both thermal and current limit protection and reverse current protection. The MIC68200 has a junction temperature range of - 40°C to +125°C and is available in fixed as well as an adjustable option. The MIC68200 is offered in the tiny 10-pin 3mm x 3mm MLF® package. Features - - - - - - - - - - - - - - - - - Stable with 4.7µF ceramic...