SY10-100EP451L Datasheet | Micrel Semiconductor

SY10/100EP451L 3.3V ECL 6-Bit Differential Register with Master Reset General Description The SY10/100EP451L is a 6-bit fully differential register with mon clock and single-ended Master Reset (MR). It is ideal for very high frequency applications where a registered data path is necessary. All inputs have an internal 75kΩ pull-down resistor. Differential inputs have an override clamp. Unused differential register inputs can be left open and will default LOW. When the differential inputs are forced to a value smaller than VEE +1.2V, the clamp will override and force the output to a default state. The positive transition of CLK (pin 4) will latch the registers. Master Reset (MR) HIGH...