SY10EP33V Datasheet | Micrel Semiconductor

5V/3.3V 4GHz, ÷ 4 PECL/LVPECL DIVIDER Precision Edge™ SY10EP33V SY100EP33V FINAL Features s Guaranteed maximum frequency >4GHz s 3.3V and 5V power supply options s Guaranteed propagation delay <460ps over temperature s Wide operating temperature range: - 40°C to +85°C s Available in 8-pin MSOP and SOIC packages ECL Pro™ DESCRIPTION The SY10/100EP33V is an integrated ÷4 divider. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC-coupled inputs. When used, decouple VBB and VCC via a 0.01µF capacitor and limit current sourcing or sinking to 0.5m A. When not used, VBB should be left open. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronous use of multiple EP33s in a system. The 100K Series includes internal temperature pensation circuitry. PIN CONFIGURATION/BLOCK DIAGRAM RESET CLK /CLK VBB 1 R 2 ÷4 3 4 8 7 6 5 VCC Q /Q VEE .. PIN NAMES Pin CLK, /CLK RESET Function ECL Clock Inputs with Internal 75kΩ Pull-Down Resistor, Default State is LOW ECL Asynchronous Reset Reference Voltage Output ECL Data Outputs TOP VIEW (Available in MSOP or SOIC package) VBB Q, /Q TRUTH TABLE(1) CLK X /CLK X RESET Z L Note 1. F = Divide by 4 function /Q H F Precision Edge and ECL Pro are trademarks of Micrel, Inc. Rev.: C Amendment: /0 Issue Date: March 2003 Micrel Precision Edge™ SY10EP33V...