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PL123-09 Datasheet PDF

Micrel PL123-09

The PL123-09 allows control of the banks of outputs by using the S1 and S2 inputs as shown in the Selector Definition table on page 2. The synchronization is established via CLKOUT feed back to the input of the PLL.
Part No. PL123-09
Datasheet PL123-09 Download
Manufacturer
Micrel
Description Low Skew Zero Delay Buffer
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PL123-09 datasheet page 1 preview

FEATURES

Low Skew Zero Delay Buffer

DESCRIPTION

● Frequency Range 10MHz to 134 MHz
● Output Options: o 5 outputs PL123-05 o 9 outputs PL123-09
● Zero input - output delay
● Optional Drive Strength: Standard (8mA) PL123-05/-09 High (12mA) PL123-05H/-09H
● 3.3V, ±10% operation
● Available in Commercial and Industrial temperature ranges
● Available in 16-Pin SOP or TSSOP (PL123-09), and 8-Pin SOP (PL123-05) packages The PL123-05/-09 (-05H/-09H for High Drive) are high performance, low skew, low jitter zero delay buffers designed to distribute high speed clocks. They have one (PL123-05) or two (PL123-09) low-skew output banks, of 4 outputs each, that are synchronized with the input. Since the skew between the input and output is less than 100p
PL123-09 page 2 preview PL123-09 page 3 preview