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PL685-88 - 19MHz to 800MHz Low Phase-Noise XO

General Description

The PL685 is a Dual LC core monolithic IC clock, capable of maintaining sub-1ps RMS phase jitter, while covering a wide frequency output range up to 800MHz, without the use of external components.

Key Features

  • or use as critical components in life support devices or systems without the express written approval of the President of Micrel Inc. Micrel Inc.
  • 2180 Fortune Dri.

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Datasheet Details

Part number PL685-88
Manufacturer Micrel
File Size 327.41 KB
Description 19MHz to 800MHz Low Phase-Noise XO
Datasheet download datasheet PL685-88 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
(Preliminary) PL685-88 FE AT UR E S 19MHz to 800MHz Low Phase-Noise XO PAD CONFIGURATION  < 0.5ps RMS phase jitter (12kHz to 20MHz) at 622.08MHz  30ps max peak to peak period jitter  8bit Switch Capacitor for ±50PPM crystal CLoad tuning о Load Capacitance Tuning Range: 8pF to 12pF  Ultra Low-Power Consumption о < 90 mA @622MHz PECL output о <10A at Power Down (PDB) Mode  Input Frequency: о Fundamental Crystal: 19MHz to 40MHz  Output Frequency: о 19MHz to 800MHz output.  Output types: LVPECL.  Programmable OE input polarity selection.  Power Supply: 3.