FEATURES
s 5V and 3.3V power supplies required s Also, supports LVPECL-to-PECL translation s 500ps propagation delays s Fully differential design s Differential line receiver capability s Application note s Available in 20-pin SOIC package DESCRIPTION
SY100EL92 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-toLVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details. VBB outputs are provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the D input and the active signal will drive the D input. When used, the VBB should be bypassed to VCC via a 0.01µF capacitor. As a result, the pin can only source/sink 0.5mA of current. To accomplish the PECL-to-LVPECL level translation, the SY100EL92 requires three power rails. The VCC and VCC_VBB supply is to be connected to the standard PECL supply, the 3.3V supply is to be connected to the VCCO supply, and GND is connected to the system ground plane.
Micrel
