Datasheet4U Logo Datasheet4U.com

ML2264 - 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H)

General Description

The ML2264 is a high-speed, µP compatible, 4-channel 8-bit A/D converter with a conversion time of 680ns over the operating temperature range and supply voltage tolerance.

The ML2264 operates from a single 5V supply and has an analog input range from GND to VCC.

Key Features

  • s s s s s s s s s s s s s s Conversion time, WR-RD mode over temperature and supply voltage tolerance Track & Hold Mode 830ns max Sample & Hold Mode 700ns max Total unadjusted error ±1/2 LSB or ±1 LSB Capable of digitizing a 5V, 250kHz sine wave 4-analog input channels No missing codes 0V to 5V analog input range with single 5V power supply No zero or full scale adjust required Analog input protection 25mA min Operates ratiometrically or with up to 5V voltage reference No external clock re.

📥 Download Datasheet

Datasheet Details

Part number ML2264
Manufacturer Micro Linear
File Size 307.87 KB
Description 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H)
Datasheet download datasheet ML2264 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
May 1997 ML2264* 4-Channel High-Speed 8-Bit A/D Converter with T/H (S/H) GENERAL DESCRIPTION The ML2264 is a high-speed, µP compatible, 4-channel 8-bit A/D converter with a conversion time of 680ns over the operating temperature range and supply voltage tolerance. The ML2264 operates from a single 5V supply and has an analog input range from GND to VCC. The ML2264 has two different pin selectable modes. The T/H mode has an internal track and hold. The S/H mode has a true internal sample and hold and can digitize 0 to 5V sinusoidal signals as high as 500kHz. The ML2264 digital interface has been designed so that the device appears as a memory location or I/O port to a µP. Analog input channels are selected by the latched and decoded multiplexer address inputs.