GENERAL DESCRIPTION
An internal DC restoration feedback loop nulls any offset voltage produced in the input stage. An enable pin gates the comparator on or off in response to the input signal level or a system control signal. The Link Detect circuit provides an Assert-Deassert function with a user-selectable threshold voltage. This circuit monitors the input signal and provides an ECL High output within 100ms of signal acquisition and an ECL Low output within 350ms of signal loss. The ECL discriminator output can be used to disable the comparator when the signal is below the user-selected threshold. LINKLED drives an LED for a visible indication of the link status. FEATURES
s s s s s 200 MHz bandwidth Low noise design Adjustable Link Detect function Low power design: 35mA typical Used with the ML6633 LED driver APPLICATIONS
s s s s s FDDI Fast Ethernet, 100BASE-FX ATM (SONET), 155Mbps Fibre Channel, 133 or 266Mbps Proprietary high-speed fiber optic data links *Some Packages Are Obsolet...