Datasheet4U Logo Datasheet4U.com

ML6691 - 100BASE-T MII-to-PMD Transceiver

General Description

The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard.

Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and collision detect.

accessible through the

Key Features

  • s s s s s s s s s Conforms to the Fast Ethernet 100BASE-T IEEE 802.3µ standard Integrated 4B/5B encoder/decoder Integrated Stream Cipher scrambler/descrambler Compliant MII interface Two-wire serial interface management port for configuration and control On-chip 25 MHz crystal oscillator Interfaces to either AMD’s PDT/PDR (AM79865/79866) or Motorola’s FCG (MC68836) Used with ML6673 for 100BASE-TX solutions 44-pin PLCC package.
  • This Part Is End Of Life As Of August 1, 2000 BLOCK.

📥 Download Datasheet

Datasheet Details

Part number ML6691
Manufacturer Micro Linear
File Size 143.08 KB
Description 100BASE-T MII-to-PMD Transceiver
Datasheet download datasheet ML6691 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
March 1997 ML6691* 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and collision detect. Additional functions of the ML6691 — accessible through the two-wire MII management interface — include full duplex operation, loopback, power down mode, and MII isolation. The ML6691 is designed to interface to a 100BASE-T Ethernet Media Access Controller (MAC) via the MII (Media Independent Interface) on one side, and a 100BASE-X PMD transceiver on the other side.