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MTG-12864D - LCD

General Description

DB0~DB7 Data Bus: 3-state I/O common terminal.

CS1 CS2 Chip select for the left half of the display.

Active high Chip select for the right half of the display.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MTG-12864D GENERAL SPECIFICATION Item Number of Character Module Size Viewing Area Dot Size/Dot Pitch Backlight Options Built-in Controller 128x64 75.0(W)x52.7(H)x6.8/9.0(D)mm Max 60.0(W)x32.5(H)mm 0.40(W)x0.40(H)mm/0.43(W)x0.43(H)mm Without/EL/LED Gray STN/Yellow STN/Normal/Extended Temperature/Bottom/Top Viewing KS0108 or compatible INTERFACE PIN ASSIGNMENT Content Pin No. Pin Out 1 2 3 4~11 12 13 V DD V SS V ADJ Function Description Logic supply voltage GND S u p p l y v o l t a g e f o r L C D p a n e l , T U N I N G F R O M V DD- V EE DB0~DB7 Data Bus: 3-state I/O common terminal. CS1 CS2 Chip select for the left half of the display. Active high Chip select for the right half of the display. Active high Setting the RES signal to Low level can initialize the following registers. 1.